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ISZ0803NLS Scheda tecnica(PDF) 4 Page - Infineon Technologies AG |
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ISZ0803NLS Scheda tecnica(HTML) 4 Page - Infineon Technologies AG |
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4 / 11 page ![]() 4 OptiMOSTM5Power-Transistor,100V ISZ0803NLS Rev.2.1,2021-04-01 Final Data Sheet 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Drain-source breakdown voltage V(BR)DSS 100 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 1.1 1.6 2.3 V VDS=VGS,ID=18µA Zero gate voltage drain current IDSS - - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - - 15.5 20.1 16.9 21.9 m Ω VGS=10V,ID=20A VGS=4.5V,ID=10A Gate resistance 1) RG - 1.0 - Ω - Transconductance gfs - 32 - S |VDS| ≥2|ID|RDS(on)max,ID=20A Table5Dynamiccharacteristics Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Input capacitance 1) Ciss - 790 1000 pF VGS=0V,VDS=50V,f=1MHz Output capacitance 1) Coss - 140 180 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance 1) Crss - 7.1 12 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 5.6 - ns VDD=50V,VGS=4.5V,ID=20A, RG,ext=3 Ω Rise time tr - 4.0 - ns VDD=50V,VGS=4.5V,ID=20A, RG,ext=3 Ω Turn-off delay time td(off) - 10 - ns VDD=50V,VGS=4.5V,ID=20A, RG,ext=3 Ω Fall time tf - 2.2 - ns VDD=50V,VGS=4.5V,ID=20A, RG,ext=3 Ω Table6Gatechargecharacteristics2) Values Min. Typ. Max. Parameter Symbol Unit Note/TestCondition Gate to source charge Qgs - 2.6 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate charge at threshold Qg(th) - 1.3 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate to drain charge Qgd - 2.2 - nC VDD=50V,ID=20A,VGS=0to4.5V Switching charge Qsw - 3.5 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate charge total 1) Qg - 6.0 7 nC VDD=50V,ID=20A,VGS=0to4.5V Gate plateau voltage Vplateau - 3.3 - V VDD=50V,ID=20A,VGS=0to4.5V Gate charge total 1) Qg - 11 15 nC VDD=50V,ID=20A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 10 - nC VDS=0.1V,VGS=0to10V Output charge Qoss - 16 - nC VDS=50V,VGS=0V 1) Defined by design. Not subject to production test. 2) See ″Gate charge waveforms″ for parameter definition |
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