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MAX17521 Scheda tecnica(PDF) 2 Page - Maxim Integrated Products |
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MAX17521 Scheda tecnica(HTML) 2 Page - Maxim Integrated Products |
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2 / 10 page ![]() Maxim Integrated │ 2 www.maximintegrated.com Evaluates: MAX17521 in 3.3V and 5V Output-Voltage Application MAX17521 Evaluation Kit Detailed Description The MAX17521 EV kit provides a proven design to evaluate the MAX17521 high-efficiency, high-voltage, dual synchronous step-down DC-DC converter. The EV kit generates 3.3V and 5V, at load currents up to 1A, from a 7V to 60V input supply. The EV kit features a switching-frequency selector pin and individual mode-of-operation selector pins, enable/ undervoltage-lockout (EN/UVLO) pins, programmable soft-start pins, and open-drain RESET signals for each output. Soft-Start Input (SS) The device implements adjustable soft-start operation to reduce inrush current. Capacitors connected from the SS pins to SGND programs the soft-start time for the corresponding output voltage. The selected output capacitance (CSEL) and the output voltage (VOUT) determine the minimum required soft-start capacitor as follows: CSS ≥ 56 x 10-6 x CSEL x VOUT The soft-start time (tSS) is related to the capacitor connected at SS (CSS) by the following equation: tSS = CSS/(5.55 x 10-6) For example, to program a 1ms soft-start time, a 5.6nF capacitor should be connected from the SS pin to SGND. Regulator Enable/Undervoltage-Lockout Level (EN/UVLO1, EN/UVLO2) The device offers an adjustable input undervoltage- lockout level for each output. Set the voltage at which each converter turns on with a resistive voltage-divider connected from VIN to SGND (viewable here). Connect the center node of the divider to EN/UVLO pin. Choose RTOP to be 3.3MΩ, and then calculate RBOTTOM as: TOP BOTTOM INU R 1.218 R V 1.218 × = − Where VINU is the input voltage at which a particular converter is required to turn on. Install a shunt across pins 1-2 on J1 and J2 to enable the EV kit’s outputs. See Table 1 and Table 2 for proper jumper settings. Table 1. Regulator Enable (EN/UVLO1) Description (J1) *Default position. *Default position. Table 2. Regulator Enable (EN/UVLO2) Description (J2) SHUNT POSITION EN/UVLO1 PIN MAX17521_ OUTPUT1 1-2* Connected to VIN1 Enabled Not installed Connected to the center node of resistor-divider R3 and R4 Enabled, UVLO level set through the R3 and R4 resistors 2-3 Connected to SGND Disabled SHUNT POSITION EN/UVLO2 PIN MAX17521_ OUTPUT2 1-2* Connected to VIN2 Enabled Not installed Connected to the center node of resistor-divider R11 and R12 Enabled, UVLO level set through the R11 and R12 resistors 2-3 Connected to SGND Disabled |
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