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PLL602-10DM Scheda tecnica(PDF) 2 Page - PhaseLink Corporation |
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PLL602-10DM Scheda tecnica(HTML) 2 Page - PhaseLink Corporation |
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2 / 7 page ![]() Preliminary PLL602-10 96MHz – 400MHz Low Phase Noise XO (for 12 – 25MHz Crystals) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/06/02 Page 2 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 7 V Input Voltage, dc VI VSS -0.5 VDD +0.5 V Output Voltage, dc VO VSS -0.5 VDD +0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature TA 0 70 °C Junction Temperature TJ 125 °C Lead Temperature (soldering, 10s) 260 °C Input Static Discharge Voltage Protection 2 kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. 2. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN Parallel Fundamental Mode 12 25 MHz Crystal Loading Rating CL (xtal) TBD pF Recommended ESR RE AT cut 30 Ω |
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