Preliminary

PLL103-04

1-to-4 Clock Distribution Buffer

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 09/26/00 Page 2

PIN DESCRIPTIONS

Name

Number

Type

Description

FIN

1

I

Input Clock Frequency (FIN range 0 ~ 160MHz).

CLK1

2

O

Buffered Clock Output.

CLK2

3

O

Buffered Clock Output.

CLK3

4

O

Buffered Clock Output.

CLK4

5

O

Buffered Clock Output.

GND

6

P

Ground.

VDD

7

P

3.3V Power Supply.

OE

8

I

Output Enable. Tri-states all outputs if low. Internal pull-up resistor of 30 k

Ω