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AT25QL128A Scheda tecnica(PDF) 28 Page - Dialog Semiconductor |
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AT25QL128A Scheda tecnica(HTML) 28 Page - Dialog Semiconductor |
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28 / 84 page ![]() 27 AT25QL128A DS-AT25QL128A–129E–01-2021 8.10 Fast Read in QPI Mode When QPI mode is enabled, the number of dummy clock is configured by the Set Read Parameters (C0h) instruction to accommodate wide range applications with different needs for either maximum Fast Read frequency or minimum data access latency. Depending on the Read Parameter Bit P[4] and P[5] setting, the number of dummy clocks can be configured as either 4, or 6 or 8. The default number of dummy clocks upon power up or after a Reset instruction is four. (See Figure 8-11, Figure 8-12, and Figure 8-13). Figure 8-12. Fast Read instruction (QPI Mode, 80MHz) Figure 8-13. Fast Read instruction (QPI Mode, 104MHz) |
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