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ADPA7006CHIP Scheda tecnica(PDF) 18 Page - Analog Devices |
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ADPA7006CHIP Scheda tecnica(HTML) 18 Page - Analog Devices |
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18 / 24 page ![]() ADPA7006CHIP Data Sheet Rev. 0 | Page 18 of 24 BIASING THE ADPA7006CHIP WITH THE HMC980LP4E The HMC980LP4E is an active bias controller designed to meet the bias requirements for enhancement mode and depletion mode amplifiers, such as the ADPA7006CHIP. The controller provides constant drain current biasing over temperature and device to device variation, and properly sequences gate and drain voltages to ensure the safe operation of the amplifier. The HMC980LP4E also offers self protection in the event of a short circuit, an internal charge pump that generates the negative voltage needed on the gate of the ADPA7006CHIP, and the option to use an external negative voltage source. The HMC980LP4E is also available in die form as the HMC980- DIE. 2 1 3 4 5 6 18 17 16 15 14 13 ALM EN S1 S0 VDD VDD VG2_CONT PACKAGE BASE GND VG2 VNEG VGATE VDRAIN VDRAIN CONTROL BLOCK GATE CONTROL HMC980LP4E BAND GAP NEGATIVE VOLTAGE GENERATOR Figure 54. HMC980LP4E Active Bias Control APPLICATION CIRCUIT SETUP Figure 55 shows an application circuit using the HMC980LP4E to control the ADPA7006CHIP. When using an external negative supply for VNEG, refer to the application circuit shown in Figure 56. In the application circuit shown in Figure 55, the ADPA7006CHIP drain voltage and drain current are set by the following equations: VDRAIN (5 V) = VDD (5.77 V) − IDRAIN (900 mA) × 0.85 IDRAIN (900 mA) = 150 ÷ R10 (125 Ω) LIMITING VGATE FOR THE ADPA7006CHIP VGGx AMR (ABSOLUTE MAXIMUM RATING) REQUIREMENT When using the HMC980LP4E to control the ADPA7006CHIP, the minimum voltages for VNEG and VGATE must be −1.5 V to keep them within the absolute maximum rating limit for the VGGx pad of the ADPA7006CHIP. To set the minimum voltages, set R15 and R16 to the values shown in Figure 56 and Figure 57. Refer to the AN-1363 Application Note for more information and calculations for R15 and R16. |
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