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TGL2201-SM Scheda tecnica(PDF) 5 Page - Qorvo, Inc |
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TGL2201-SM Scheda tecnica(HTML) 5 Page - Qorvo, Inc |
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5 / 10 page ![]() TGL2201–SM Wideband Dual Stage VPIN Limiter Data Sheet Rev. D, April 11, 2019 | Subject to change without notice 5 of 10 www.qorvo.com ® Evaluation Board (EVB) Layout & Mounting Detail Mounting Detail Notes: 1. Top RF layer is 0.008” thick Rogers RO4003, єr = 3.55. Metal layers are 1-oz copper. Microstrip 50 Ω line width is .0174”. The microstrip line tapers to a 0.014” width at the connector interface. This PCB is designed for the Southwest Microwave end launch connector 1092-01A-5. 2. The pad pattern shown has been developed and tested for optimized assembly at Qorvo. The PCB land pattern has been developed to accommodate lead and package tolerances. Since surface mount processes vary from company to company, careful process development is recommended. 3. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 / .0135”) diameter drill and have a final plated thru diameter of 0 .25 mm (.010”). 4. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. |
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