AT25SL321 datasheet(20/82 Pages) DIALOG

Il numero della parte	AT25SL321

Spiegazioni elettronici	32-Mbit, 1.7 V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support

PDF	82 Pages

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Produttore elettronici	DIALOG [Dialog Semiconductor]

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AT25SL321

DS-25SL321–112H–2020-10

8.3

Write Enable for Volatile Status Register (50h)

This instruction provides additional flexibility to change the system configuration and memory protection schemes

quickly without waiting for the typical non-volatile bit write cycles or affecting the endurance of the Status Register

non-volatile bits. To write the volatile values into the Status Register bits, the Write Enable for Volatile Status

Enable for Volatile Status Register instruction (Figure 8-2) does not set the Write Enable Latch (WEL) bit.

Once the Write Enable for Volatile Status Register instruction is executed, a Write Enable instruction can not have

been issued prior to setting Write Status Register instruction (01h or 31h). When the Write Enable for Volatile

Status Register (50h) is set in QPI Mode, the SUS bit (S15) and Reserved bits (S13, S12, S11 and S10) of the

Status Register-2 must be driven to high after a Write Status Register instruction (01h). Once a Read Status

Status Register-2 are ignored.

Figure 8-2. Write Enable for Volatile Status Register Instruction for SPI Mode (left) and QPI Mode (right)

AT25SL321 Scheda tecnica(PDF) 20 Page - Dialog Semiconductor