Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

ICS162835 Scheda tecnica(PDF) 4 Page - Integrated Circuit Systems

Il numero della parte ICS162835
Spiegazioni elettronici  18-Bit 3.3V Registered Buffer
PDF  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS162835 Scheda tecnica(HTML) 4 Page - Integrated Circuit Systems

  ICS162835 Datasheet HTML 1Page - Integrated Circuit Systems ICS162835 Datasheet HTML 2Page - Integrated Circuit Systems ICS162835 Datasheet HTML 3Page - Integrated Circuit Systems ICS162835 Datasheet HTML 4Page - Integrated Circuit Systems ICS162835 Datasheet HTML 5Page - Integrated Circuit Systems ICS162835 Datasheet HTML 6Page - Integrated Circuit Systems ICS162835 Datasheet HTML 7Page - Integrated Circuit Systems  
Zoom Inzoom in Zoom Outzoom out
 4 / 7 page
background image
4
ICS162835
Advance Information
0713—09/23/02
Electrical Characteristics - DC
TA = 0 - 70° C; VDD = 3.3 ± 0.3V, VDDQ=3.3 ± 0.3V; (unless otherwise stated)
SYMBOL
PARAMETERS
CONDITIONS
VDD (V)
MIN
TYP
MAX
UNITS
VIH
HIGH-level input voltage
3.0 - 3.6
2.0
V
VIL
LOW-level input voltage
3.0 - 3.6
0.8
V
VOH
HIGH-level output voltage
IOH = -12 mA, VIH = 2.0V
3.0
2.2
V
VOL
Low-level output voltage
IOL = 12 mA, VIL = 0.8V
3.0
0.8
II
Input leakage current
VI = VDD or GND
3.0 - 3.6
±10
µA
IOZ
Off-state leakage current
VO = VDD or GND#, OE = VDD
±20
µA
IDD
Quiescent Supply Current
VI = VDD or GND, IO = 0
±40
µA
* Parameters are characterized over recommended operating conditions.
Critical Register Specifications*
SYMBOL
PARAMETERS
CONDITION
VDD (V)
MIN
TYP
MAX
UNITS
tPD**
Propagation Delay (CK to Y)
RL = 500 Ω, CL = 50 pF
3.0 - 3.6
1.4
3.5
ns
tPD**
Propagation Delay (CK to Y)
RL = 500 Ω, CL = 30 pF
3.0 - 3.6
0.7
2.5
ns
tS
Setup time (A before CK)
3.0 - 3.6
1.0
ns
tH
Hold time (A after CK)
3.0 - 3.6
0.6
ns
CI
Clock input capacitance
3.0 - 3.6
3.3
4.0
6.0
pF
* Parameters are characterized over recommended operating conditions.
** The tPD value in this table would equate to the 'Time-to-Vm' delay described in the post register timing specifications of the
PC133 registered DIMM Specification. The first value applies to DIMMs with nine SDRAM loads per register output, and the
second to DIMMs with eighteen SDRAM loads per register output. These values should serve as only an initial starting point,



Html Pages

1 2 3 4 5 6 7


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com