ZL30263 datasheet(44/94 Pages) MICROCHIP

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ZL30260-ZL30263

Data Sheet

DS20006554A

Bit 1: GPIO1 State (GPIO1). This real-time status bit indicates the current state of the GPIO1 pin, not influenced by

inversion that may be specified by GPIOCR1.GPIO1C.

0 = low

1 = high

Bit 0: GPIO0 State (GPIO0). This real-time status bit indicates the current state of the GPIO0 pin, not influenced by

inversion that may be specified by GPIOCR1.GPIO0C.

0 = low

1 = high

INTSR

Interrupt Status Register

42h

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

—

APLL

INTIE

INT

Default

Bit 5: Output Clock Interrupt Status (OC). This read-only bit is set if any of the output clock interrupt status bits

are set in the OCISR1 register. See section 5.8.

Bit 4: Input Clock Interrupt Status (IC). This read-only bit is set if any of the input clock interrupt status bits are set

in the ICISR register. See section 5.8.

Bit 2: APLL Interrupt Status (APLL). This read-only bit is set if any of the APLL interrupt status bits are set in the

APLLISR register. See section 5.8.

Bit 1: Interrupt Enable Bit (INTIE). This is the global interrupt enable bit. When this bit is 0 all interrupt sources are

prevented from setting the INT global interrupt status bit (below). See section 5.8.

0 = Interrupts are disabled at the global level

1 = Interrupts are enabled at the global level

Bit 0: Interrupt Status (INT). This read-only bit is set when any of the IC, OC or APLL bits in this INTSR register are

set and the INTIE bit is set. It is also set by GPIO latched status bits that have their corresponding interrupt enable

bits set. This bit can cause an interrupt request when set by configuring one of the GPIO pins to follow it. See section

5.8.

0 = No interrupt

1 = An unmasked interrupt source is active

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