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ICS556-01 Scheda tecnica(PDF) 2 Page - Integrated Circuit Systems |
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ICS556-01 Scheda tecnica(HTML) 2 Page - Integrated Circuit Systems |
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2 / 6 page ![]() MDS 556-01 B 2 Revision 020204 In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com Broadcom 25 MHz LVDS Clock ICS556-01 Pin Assignment Pin Descriptions External Component Selection The ICS556-01 requires a minimum number of external components for proper operation. A 100 Ω termination resistor between CLK and CLK is provided on-chip. Decoupling Capacitors A decoupling capacitor of 0.01 µF should be connected between VDD and GND on pins 2 and 3 as close to the ICS556-01 as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. LVDS Driver Termination A general LVDS interface is shown in Figure 2. In a 100 differential transmission line environment, LVDS drivers require a matched load termination of 100 across near the receiver input. For a multiple LVDS outputs buffer, if only partial outputs are used, it is recommended to terminate the un-used outputs. X2 X1 VDD GND CLK 1 2 3 4 8 7 6 5 I C S 556- 01 8 P i n ( 1 73m i l ) T S S O P or SO I C CLK GND OE Pin Number Pin Name Pin Type Pin Description 1 X1 Input Crystal connection. 2 VDD Power Power supply. Connect to 2.5 V. 3 GND Power Connect to ground. 4 GND Power Connect to ground. 5CLK Output Inverting differential clock output. 6 CLK Power Differential clock output. 7 OE Input Output Enable. Internal pull-up resistor. 8 X2 Input Crystal connection. F I G URE 2 . T Y P I CA L LVDS DRIVE R TE RMINATIO N R1 100 ohm + - 2.5V 2.5V 100 Ohm Differential Transmission Line LVDS_Driver |
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