ICS83940DI datasheet(9/13 Pages) ICST

Il numero della parte	ICS83940DI

Spiegazioni elettronici	LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

PDF	13 Pages

Scroll/Zoom	100%

Produttore elettronici	ICST [Integrated Circuit Systems]

Homepage	http://www.icst.com

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9 / 13 page

83940DYI

www.icst.com/products/hiperclocks.html

REV. A DECEMBER 12, 2002

Integrated

Circuit

Systems, Inc.

ICS83940DI

LOW SKEW, 1-TO-18

LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

APPLICATION INFORMATION

Figure 1 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

DD/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

CLK_IN

0.1uF

V_REF

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V

DD = 3.3V, V_REF should be 1.25V

and R2/R1 = 0.609.

ICS83940DI Scheda tecnica(PDF) 9 Page - Integrated Circuit Systems