Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

ICS843003AI01 Scheda tecnica(PDF) 10 Page - Integrated Circuit Systems

Il numero della parte ICS843003AI01
Spiegazioni elettronici  FEMTOCLOCKS-TM CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
PDF  13 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS843003AI01 Scheda tecnica(HTML) 10 Page - Integrated Circuit Systems

Back Button ICS843003AI01 Datasheet HTML 5Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 6Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 7Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 8Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 9Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 10Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 11Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 12Page - Integrated Circuit Systems ICS843003AI01 Datasheet HTML 13Page - Integrated Circuit Systems  
Zoom Inzoom in Zoom Outzoom out
 10 / 13 page
background image
843003AGI-01
www.icst.com/products/hiperclocks.html
REV. A MAY 26, 2005
10
Integrated
Circuit
Systems, Inc.
ICS843003I-01
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
PRELIMINARY
TERMINATION FOR 3.3V LVPECL OUTPUT
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
FIGURE 4B. LVPECL OUTPUT TERMINATION
FIGURE 4A. LVPECL OUTPUT TERMINATION
designed to drive 50
Ω transmission lines. Matched imped-
ance techniques should be used to maximize operating
frequency and minimize signal distortion.
Figures 4A and
4B show two different layouts which are recommended
only as guidelines. Other suitable clock layouts may exist
and it would be recommended that the board designers
simulate to guarantee compatibility across all printed cir-
cuit and clock component process variations.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com