ICS8305I datasheet(12/15 Pages) ICST

12 / 15 page

Integrated

Circuit

Systems, Inc.

8305AGI

www.icst.com/products/hiperclocks.html

REV. B MAY 19, 2005

ICS8305I

LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/

LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

RELIABILITY INFORMATION

TRANSISTOR COUNT

The transistor count for ICS8305I is: 459

TABLE 6.

. AIR FLOW TABLE FOR 16 LEAD TSSOP

θθθθθ

JA by Velocity (Linear Feet per Minute)

200

500

Single-Layer PCB, JEDEC Standard Test Boards

137.1°C/W

118.2°C/W

106.8°C/W

Multi-Layer PCB, JEDEC Standard Test Boards

89.0°C/W

81.8°C/W

78.1°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

LVCMOS Receiv er

VDD

LVCMOS Receiv er

VDD=3.3V

VDD

Zo = 50

(U1,11)

Ro ~ 7 Ohm

3,.3V LVCMOS

(U1,15)

(U1,3)

VDD

0.1u

ICS8305

GND

VDD

CLK_EN

CLK

nCLK

CLK_SEL

LVCMOS_CLK

GND

VDDO

GND

VDDO

Zo = 50

VDD

Zo = 50

0.1u

SCHEMATIC EXAMPLE

This application note provides general design guide using

ICS8305I LVCMOS buffer.

Figure 4 shows a schematic example

of the ICS8305I LVCMOS clock buffer. In this example, the input

FIGURE 4. EXAMPLE ICS8305I LVCMOS CLOCK OUTPUT BUFFER SCHEMATIC

is driven by an LVCMOS driver. CLK_EN is set at logic low to

select LVCMOS_CLK input.

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