SST26VF040A-80ISLASHSNVAO datasheet(8/73 Pages) MICROCHIP

Il numero della parte	SST26VF040A-80I/SNVAO

Spiegazioni elettronici	2.5V/3.0V 4-Mbit Serial Quad I/O??(SQI?? Flash Memory

PDF	73 Pages

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Produttore elettronici	MICROCHIP [Microchip Technology]

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DS20006292B-page 8

SST26VF040A

4.5.2

SOFTWARE RESET OPERATION

The Reset operation requires the Reset Enable

command, 66H, followed by the Reset command, 99H.

Once the Reset Enable and Reset commands are

successfully executed, the device returns to normal

operation Read mode and then does the following:

resets the protocol to SPI mode, resets the burst length

to 8 bytes, STATUS register bits BUSY = 0, WEL = 0;

and clears bit 1 (IOC) in the Configuration register to its

default state.

FIGURE 4-4:

PERFORMING SOFTWARE RESET DURING READ

Note:

Any command other than the Reset com-

mand after the Reset Enable command

will disable the Reset Enable.

Device requires Software Reset

while performing Read.

Was the previous

Instruction a

mode Read with

M[7:0]=AXH

Issue either a Reset Quad I/O command

(0xFF instruction) or a Software Reset

command (0x66 instruction followed by

0x99 instruction) to exit mode Read.

Issue Software Reset command (0x66

instruction followed by 0x99 instruction)

to reset the device.

Device is Reset.

Yes

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