IL1815

5

pin 09) or processed input signal (from pin 03), having passed the controller of data

transmission delay, for transmission to output stage of IC logic block.

The amplifier is started by incoming positive threshold voltage that is generated during

effect of voltage peak on output 07. This peak appears when input signal comes into

output 03 of the circuit and its maximum value varies in time with input signal amplitude.

Thus, input hysteresis changes with amplitude of input signal. That allows electrical circuit

to perceive the signal where high-frequency noise is grater than amplitude of input signal

Latching circuit of input voltage.

Voltage of input signal on output 03 is internally fixed.

Напряжение входного сигнала на выводе 03 внутренне зафиксировано. Remaining

limit of input signal on this output is ensured by external resistor R3 (see fig.1), which is to

conditions.

T1

R2

2kOhm

R1

1kOhm

R3

1kOhm

Vp

T4

T2

T3

T5

T6

T7

Output 03

Input voltage latching circuit

.

Positive inputs of amplifiers (from output 03) are fixed in electrical circuit (see fig.2) by

connected in series resistor R3 and diode T4 connected to «ground». Therefore for

changes of input signal exceeding 500 mV relative to «ground» level, input current will be

«dropped» on «ground» through output 02 of the device. On the other hand, active limits

of the above mentioned latch tie output 3 usually to 350 mV below «ground» level for

negative input signals (see R1, R2, T2, T3 in fig.2). Thus, for transmitting input signal more