SH7041A datasheet(535/923 Pages) RENESAS

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SH7041A Scheda tecnica(PDF) 535 Page - Renesas Technology Corp

Il numero della parte	SH7041A

Spiegazioni elettronici	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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535 / 923 page

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B: Bit rate (bit/s)

N: Baud rate generator BRR setting (0

≤ N ≤ 255)

φ: Operating frequency (MHz)

n: Baud rate generator input clock (n = 0 to 3)

(See the following table for the clock sources and value of n.)

SMR Settings

Clock Source

CKS1

CKS2

φ/4

φ/16

φ/64

The bit rate error in asynchronous mode is calculated as follows:

Error (%)

+1) × B × 64 × 2

2n–1

=× 100

–1

φ × 10

Table 14.5 indicates the maximum bit rates in the asynchronous mode when the baud rate

generator is being used for various frequencies. Tables 14.6 and 14.7 show the maximum rates for

external clock input.

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