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MPC8560CPX667JC Scheda tecnica(PDF) 85 Page - NXP Semiconductors |
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MPC8560CPX667JC Scheda tecnica(HTML) 85 Page - NXP Semiconductors |
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85 / 108 page  MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2 Freescale Semiconductor 85 Thermal Figure 52. MPC8560 Thermal Model 16.2.2 Internal Package Conduction Resistance For the packaging technology, shown in Table 60, the intrinsic internal conduction thermal resistance paths are as follows: • The die junction-to-case thermal resistance • The die junction-to-board thermal resistance Die Lid Substrate and solder balls Heat Source Substrate Side View of Model (Not to Scale) Top View of Model (Not to Scale) x y z Conductivity Value Unit Lid (12 × 14 × 1 mm) kx 360 W/(m × K) ky 360 kz 360 Lid Adhesive—Collapsed resistance (10 × 12 × 0.050 mm) kx 1 ky 1 kz 1 Die (10 × 12 × 0.76 mm) Bump/Underfill—Collapsed resistance (10 × 12 × 0.070 mm) kx 0.6 ky 0.6 kz 1.9 Substrate and Solder Balls (29 × 29 × 1.47 mm) kx 10.2 ky 10.2 kz 1.6 Adhesive Bump/underfill |
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