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AS5050A Scheda tecnica(PDF) 20 Page - ams AG |
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AS5050A Scheda tecnica(HTML) 20 Page - ams AG |
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20 / 31 page ![]() Page 20 ams Datasheet Document Feedback [v2-06] 2014-Oct-14 AS5050A − Registers Figure 24: Data Package Master Reset (0x33A5) Writing to the Master Reset Register initiates a Master Reset. This is similar to the Software Reset with the difference that no data package is needed. Figure 25: Master Reset Command Clear Error Flag (0x3380) Reading from the Clear Error Flag Register clears the Error Flag which is contained in every Read Data Frame. The Read data is 0x0000 which indicates a successful clear command. Figure 26: Clear Error Flag Command Bit 15 141312 1110 9 8 7 6 5 4 3 2 1 0 DC RES SPI DC PAR Bit Name Description 15:3 DC Don’t Care 2 RES SPI If set to 1 the SPI registers are reset as well 1 DC Don’t Care 0 PAR Parity bit (even) calculated on the upper 15 bits Bit 15 14 13 12 11 10 98765 4 3 2 1 0 Content 0 1 1 0 0 1 1 1 0 1 0 0 10 1PAR Bit 15 14 13 12 11 10 98765 4 3 2 1 0 Content 1 1 1 0 0 1 1 1 0 0 0 0 00 0PAR |
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