LTC2977 datasheet(96/138 Pages) AD

96 / 138 page

LTM4664A

Rev. 0

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For both equations,

G = MFR_TEMP_1_GAIN • 2–14, and

O = MFR_TEMP_1_OFFSET

Bit[2] is now reserved, and Ultra Low DCR mode is default.

Bit[1] of this command determines if the part is in high range or low voltage range. Changing this bit value changes

the PWM loop gain and compensation. This bit value should not be changed when the channel output is active. Writing

this bit when the channel is active will generate a CML fault.

Bit[0] determines if the PWM mode of operation is discontinuous (pulse-skipping mode), or forced continuous con-

duction mode. Whenever the channel is ramping on, the PWM mode will be discontinuous, regardless of the value of

this bit. This command has one data byte.

MFR_PWM_COMP

The MFR_PWM_COMP command sets the gm of the PWM channel error amplifiers and the value of the internal RITHn

compensation resistors. This command affects the loop gain of the PWM output which may require modifications to

the external compensation network.

BIT

MEANING

BIT [7:5]

Error Amplifier GM Adjust (ms)

000b

1.00

001b

1.68

010b

2.35

011b

3.02

100b

3.69

101b

4.36

110b

5.04

111b

5.73

BIT [4:0]

RCOMP (kΩ)

00000b

00001b

0.25

00010b

0.5

00011b

0.75

00100b

00101b

1.25

00110b

1.5

00111b

1.75

01000b

01001b

2.5

01010b

01011b

3.5

01100b

01101b

4.5

01110b

PMBus COMMAND DETAILS

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