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SSD1730 Scheda tecnica(PDF) 7 Page - List of Unclassifed Manufacturers

Il numero della parte SSD1730
Spiegazioni elettronici  SSD1730 MLA Power Chip CMOS
PDF  21 Pages
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Produttore elettronici  ETC1 [List of Unclassifed Manufacturers]
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SSD1730 Scheda tecnica(HTML) 7 Page - List of Unclassifed Manufacturers

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SSD1730
Rev 2.0
04/2002
SOLOMON
5
7. PIN DESCRIPTION
Key:
I =Input
O =Output
I/O = Bi-Directional (Input/Output)
P = Power pin
NC = Dummy pin
Pin Name
Type
Pin#
Description
VDD_PWR
P
17, 29 &36
Power supply pin
VSS
P
5, 15, 22, 31 & 41
Ground pin
Table 3 - Power Supply Pins
Pin Name
Type
Pin#
Description
L0 to L3
I
37 to 40
These input pins are used to set the polarity
reversal interval ranging from 2P to 17P.
FR
O
43
This is an output pin and the FR signal is
generated from the LCD polarity reverse signal
generator.
XFR
O
44
This is an output pin and the XFR signal is also
generated from the LCD polarity reverse signal
generator. This signal is a reverse phase from FR
signal.
Table 4 - Pins for frame signal generator
Pin Name
Type
Pin#
Description
LP
I
42
This input pin is used to generate the charge pump
clock and the polarity reverse signal FR and XFR.
A pulse signal with a period of 1P should be fed
into this pin.
XSLP
I
45
This input pin is used to switch on or off the
display. When it is set to VSS level, the clock and
the operations of the voltage converter will be stop.
The display will be off. When it is set to VDD_PWR
level, the display will be on.
Table 5 - Pins for clock signal generator



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