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TA100 Scheda tecnica(PDF) 5 Page - Microchip Technology |
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TA100 Scheda tecnica(HTML) 5 Page - Microchip Technology |
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5 / 28 page ![]() ...........continued Pin Name Pin Number Function SDA 5 I2C Data SCL 6 I2C Clock RESET 7 Reset Input, active low VCC 8 2.7V-5.5V Power Supply Figure 1-2. Pinout 1 2 3 4 SDA SCL 5 6 RESET 7 VCC 8 GPIO_1 GPIO_2 GPIO_3 VSS RESET GPIO Pwr/Gnd I2C I/O 1.3 SOIC-14 Pinout with I2C and SPI Interface In the 14-pin package, there is access to both the I2C and SPI bus pins. Both can be used simultaneously. However, any concurrent transactions must be to different blocks in the device. Pull-up resistors are required for proper operation of the I2C bus, sized according to the board configuration and bus speed required per the I2C specification. Table 1-3. 14-Pin SOIC Pin Configuration Pin Name Pin Number Function CS 1 Chip Select for SPI GPIO_1 2 General Purpose I/O pin GPIO_2 3 General Purpose I/O pin NC 4, 5 Not Internally Connected GPIO_3 6 General Purpose I/O pin VSS 7 Ground SDA 8 I2C Data SCL 9 I2C Clock SI 10 SPI Serial Data Input SCK 11 SPI Clock SO 12 SPI Serial Data Output RESET 13 Reset Input, active low VCC 14 2.7V-5.5V Power Supply TA100 (B5) Pin Configuration © 2020-2021 Microchip Technology Inc. and its subsidiaries Summary Datasheet DS20006369C-page 5 |
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