Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

STM32469VG Scheda tecnica(PDF) 140 Page - STMicroelectronics

Il numero della parte STM32469VG
Spiegazioni elettronici  Arm® Cortex®-M4 32b MCUFPU, 225DMIPS, up to 2MB Flash/3844KB RAM, USB OTG HS/FS, Ethernet, FMC, dual Quad-SPI, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
PDF  220 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32469VG Scheda tecnica(HTML) 140 Page - STMicroelectronics

Back Button STM32469VG Datasheet HTML 136Page - STMicroelectronics STM32469VG Datasheet HTML 137Page - STMicroelectronics STM32469VG Datasheet HTML 138Page - STMicroelectronics STM32469VG Datasheet HTML 139Page - STMicroelectronics STM32469VG Datasheet HTML 140Page - STMicroelectronics STM32469VG Datasheet HTML 141Page - STMicroelectronics STM32469VG Datasheet HTML 142Page - STMicroelectronics STM32469VG Datasheet HTML 143Page - STMicroelectronics STM32469VG Datasheet HTML 144Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 140 / 220 page
background image
Electrical characteristics
STM32F469xx
140/220
DS11189 Rev 7
5.3.21
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 58).
Unless otherwise specified, the parameters given in Table 61 are derived from tests
performed under the ambient temperature and VDD supply voltage conditions summarized
in Table 17.
Figure 41. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 58. Otherwise the reset is not taken into account by the device.
Table 61. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RPU
Weak pull-up equivalent resistor(1)
VIN VSS
30
40
50
k
VF(NRST)(2) NRST Input filtered pulse
-
-
-
100
ns
VNF(NRST)(2) NRST Input not filtered pulse
VDD > 2.7 V
300
-
-
TNRST_OUT Generated reset pulse duration
Internal Reset source
20
-
-
µs
1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance must be minimum (~10%).
2. Guaranteed by design.
ai14132c
STM32F
RPU
NRST(2)
VDD
Filter
Internal Reset
0.1 μF
External
reset circuit (1)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com