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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STM32469VG Scheda tecnica(PDF) 31 Page - STMicroelectronics |
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STM32469VG Scheda tecnica(HTML) 31 Page - STMicroelectronics |
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31 / 220 page  DS11189 Rev 7 31/220 STM32F469xx Functional overview 47 The VDD specified threshold, below which the device must be maintained under reset, is 1.7 V (see Figure 9). A comprehensive set of power-saving mode allows to design low-power applications. When the internal reset is OFF, the following integrated features are no more supported: The integrated power-on reset (POR) / power-down reset (PDR) circuitry is disabled The brownout reset (BOR) circuitry must be disabled The embedded programmable voltage detector (PVD) is disabled VBAT functionality is no more available and VBAT pin should be connected to VDD. All packages allow to disable the internal reset through the PDR_ON signal when connected to VSS. Figure 9. PDR_ON control with internal reset OFF 1. PDR_ON signal to be kept always low. 2.20 Voltage regulator The regulator has four operating modes: Regulator ON – Main regulator mode (MR) – Low power regulator (LPR) – Power-down Regulator OFF MS19009V7 V DD time PDR = 1.7 V time NRST PDR_ON PDR_ON Reset by other source than power supply supervisor |
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