STM32WL55JC datasheet(80/147 Pages) STMICROELECTRONICS

Il numero della parte	STM32WL55JC

Spiegazioni elettronici	Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0 LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM

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Table 36. Current consumption in Run and LPRun modes on CPU1, CoreMark code with data

running from Flash memory, ART enable (cache ON, prefetch OFF)

Symbol

Parameter

Conditions

Typ

Max(1)

Unit

Voltage

scaling

fHCLK

(MHz)

25 °C

55 °C

85 °C

105 °C

25 °C

85 °C

105 °C

IDD (Run)

Supply current

in Run mode

fHCLK = fMSI

All peripherals

disabled

Range 2

1.85

1.90

1.95

2.10

2.20

2.40

2.80

1.10

1.15

1.20

1.30

1.40

1.60

1.90

0.585

0.610

0.670

0.760

SMPS

Range 2

1.50

1.45

1.65

1.70

1.00

1.05

1.10

0.730

0.750

0.780

0.830

Range 1

5.55

5.65

5.80

5.95

7.40

11.0

14.0

3.85

3.95

4.05

4.20

5.60

8.40

13.0

2.15

2.20

2.30

2.45

3.70

6.60

11.0

SMPS

Range 1

3.40

3.45

3.55

3.60

2.50

2.55

2.60

2.65

1.60

1.65

1.70

IDD

(LPRun)

Supply current

in LPRun mode

fHCLK = fMSI

All peripherals disabled

0.220

0.235

0.290

0.380

0.270

0.490

0.880

0.120

0.135

0.185

0.275

0.150

0.390

0.780

0.4

0.058

0.0715

0.120

0.210

0.084

0.330

0.710

1. Guaranteed by characterization results, unless otherwise specified.

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