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STM32WB50CG Scheda tecnica(PDF) 97 Page - STMicroelectronics |
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STM32WB50CG Scheda tecnica(HTML) 97 Page - STMicroelectronics |
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97 / 119 page ![]() DS13047 Rev 5 97/119 STM32WB50CG STM32WB30CE Electrical characteristics 110 6.3.20 Analog-to-Digital converter characteristics Unless otherwise specified, the parameters given in Table 70 are preliminary values derived from tests performed under ambient temperature, fPCLK frequency and VDDA supply voltage conditions summarized in Table 20: General operating conditions. Note: It is recommended to perform a calibration after each power-up. Table 70. ADC characteristics(1) (2) Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage - 2 - 3.6 V fADC ADC clock frequency - - - 32 MHz fs Sampling rate Resolution = 12 bits - - 2.13 Msps Resolution = 10 bits - - 2.46 Resolution = 8 bits - - 2.91 Resolution = 6 bits - - 3.55 fTRIG External trigger frequency fADC = 32 MHz Resolution = 12 bits -- 2.13 MHz Resolution = 12 bits - - 15 1/fADC VCMIN Input common mode Differential mode (VREF++ VREF-) / 2 - 0.18 (VREF++ VREF-) / 2 (VREF++ VREF-) / 2 + 0.18 V VAIN (3) Conversion voltage range(2) -0 - VREF+ V RAIN External input impedance -- - 50 kΩ CADC Internal sample and hold capacitor -- 5 - pF tSTAB Power-up time - 1 Conversion cycle tCAL Calibration time fADC = 32 MHz 3.625 µs - 116 1 / fADC tLATR Trigger conversion latency Regular and injected channels without conversion abort CKMODE = 00 1.522.5 1/fADC CKMODE = 01 - - 2.0 CKMODE = 10 - - 2.25 CKMODE = 11 - - 2.125 tLATRINJ Trigger conversion latency Injected channels aborting a regular conversion CKMODE = 00 2.533.5 1/fADC CKMODE = 01 - - 3.0 CKMODE = 10 - - 3.25 CKMODE = 11 - - 3.125 ts Sampling time fADC = 32 MHz 0.078 - 20.0 µs - 2.5 - 640.5 1/fADC |
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