AD9959

Data Sheet

Rev. C | Page 38 of 44

Register Name (Address)

Bit

Range

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Value

Channel Word 1 (CW1) (0x0A)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 2 (CW2) (0x0B)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 3 (CW3) (0x0C)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 3 (CW4) (0x0D)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 5 (CW5) (0x0E)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 6 (CW6) (0x0F)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 7 (CW7) (0x10)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 8 (CW8) (0x11)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 9 (CW9) (0x12)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 10 (CW10) (0x13)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 11 (CW11) (0x14)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 12 (CW12) (0x15)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 13 (CW13) (0x16)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 14 (CW14) (0x17)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

Channel Word 15 (CW15) (0x18)

[31:0]

Frequency tuning word[31:0] or phase word[31:18] or amplitude word[31:22]

N/A

1

Each channel word register has a capacity of 32 bits. If phase or amplitude is stored in the channel word registers, it must be first MSB aligned per the bit range.

Only the MSB byte is shown for each channel word register.