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SP9502 Scheda tecnica(PDF) 2 Page - Sipex Corporation |
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SP9502 Scheda tecnica(HTML) 2 Page - Sipex Corporation |
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2 / 11 page ![]() SP9502DS/02 SP9502 Dual, 12-Bit, Voltage Output D/A Converter © Copyright 1999 Sipex Corporation 2 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. V DD - GND ..................................................................... -0.3V,+6.0V V SS - GND .................................................................... +0.3V, -6.0V V DD - VSS ...................................................................................................................... -0.3V, +12.0V V REF ..................................................................................... VSS, VDD D IN ....................................................................................... VSS, VDD Power Dissipation Plastic DIP .......................................................................... 375mW (derate 7mW/ °C above +70°C) Small Outline ...................................................................... 375mW (derate 7mW/˚C above +70˚C) SPECIFICATIONS (Typical at 25˚C, T MIN ≤ TA≤TMAX; VDD = +5V, VSS = -5V, VREF = +3V; CMOS logic level digital inputs; specifications apply to all grades unless otherwise noted.) PARAMETER MIN. TYP. MAX. UNITS CONDITIONS DIGITAL INPUTS Logic Levels V IH 2.4 Volts V IL 0.8 Volts 4 Quad, Bipolar Coding Offset Binary REFERENCE INPUT Voltage Range +3 +4.5 Volts Note 5 Input Resistance 6 8.8 k Ω D IN = 1877, code dependent ANALOG OUTPUT Gain -K +0.5 +2.0 LSB V REF = ±3V; Note 3 -J +1.0 +4.0 LSB V REF = ±3V; Note 3 +1.0 +5.0 LSB V REF = ±4.5V; Note 3 Initial Offset Bipolar +0.25 +3.0 LSB D IN = 2,048 Voltage Range Bipolar +3.0 +4.5 Volts Output Current +5.0 mA V REF = ±3V +0.5 mA V REF = ±4.5V STATIC PERFORMANCE Resolution 12 Bits Integral Linearity -K +0.25 +0.5 LSB V REF = ±3V; Note 3 -J +0.5 +1.0 LSB V REF = ±3V; Note 3 +0.5 +3.0 LSB V REF = ±4.5V; Note 3 Differential Linearity -K +0.25 +0.75 LSB -J +0.25 +1.0 LSB Monotonicity Guaranteed DYNAMIC PERFORMANCE Settling Time Small Signal 0.5 µs to 0.012% Full Scale 4 µs to 0.012% Slew Rate 4 V/ µs Multiplying Bandwidth 2 MHz |
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