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SP674AT Scheda tecnica(PDF) 11 Page - Sipex Corporation |
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SP674AT Scheda tecnica(HTML) 11 Page - Sipex Corporation |
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11 / 14 page ![]() 13 CONVERT MODE TIMING CE CS R/C A0 STS DB11– DB0 HIGH IMPEDANCE tDSC tC tHAC tSAC tHRC tHEC tSRC tSSC CHARACTERISTICS Typical @ 25˚C, V CC = +15V or +10V, VLOGIC = +5V, V EE = 0V, unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS tDSC STS Delay from CE 200 ns tHEC CE Pulse Width 50 ns tSSC CS to CE Setup 50 ns tHSC CS Low during CE High 50 ns tSRC R/C to CE Setup 50 ns tHRC R/C Low during CE High 50 ns tSAC A0 to CE Setup 0 ns tHAC A0 Valid during CE High 50 ns tC Conversion Time1, 3, 4 See specifications NOTES: 1. Parameters guaranteed by design and sample tested. 2. Parameters 100% tested @ 25˚C on special orders. 3. 100% tested. 4. TMIN to TMAX. Figure 8. Convert Mode Timing |
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