TC270 datasheet(10/279 Pages) INFINEON

10 / 279 page

TC270 / TC275 / TC277 DC-Step

Summary of Features

Data Sheet

V 1.0 2017-01

CAN

Nodes

Message Objects

256

QSPI

Channels

ASCLIN

Interfaces

I2C

Interfaces

SENT

Channels

PSI5

Modules

PSI5-S

Modules

HSSL

Channels

MSC

Channels

Ethernet

Channels

ASIL

Level

up to ASIL-D

FCE

Modules

Safety support

SMU

IOM

Security

HSM

Embedded Voltage Regulator

DCDC from 5 V / 3.3 V to 1.3 V

Yes

Embedded Voltage Regulator

LDO from 5 V / 3.3 V to 1.3 V

Yes

Embedded Voltage Regulator

LDO from 5 V to 3.3 V

Yes

Low Power Feature

Standby RAM

Yes

Packages

Type

LF-BGA-292-6 / PG-LQFP-176-22

I/O

Type

5 V CMOS / 3.3 V CMOS / LVDS

Tambient

Range

−40 … +125°C

1) Address range starts at lowest address defined in the User’s Manual. For reference see the Memory Maps chapter of the

User’s Manual.

2) To ensure the processor cores are provided with a constant stream of instructions the Instruction Fetch Units will

speculatively fetch instructions from the up to 64 bytes ahead of the current PC.

If the current PC is within 64 bytes of the top of an instruction memory the Instruction Fetch Unit may attempt to

speculatively fetch instruction from beyond the physical range. This may then lead to error conditions and alarms being

triggered by the bus and memory systems.

It is therefore recommended that the upper 64 bytes of any memory be unused for instruction storage.

Table 1-1

Overview of TC27x Functions

(cont’d)

Feature

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