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PIC16F616-E/ML Scheda tecnica(PDF) 30 Page - Cirrus Logic |
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PIC16F616-E/ML Scheda tecnica(HTML) 30 Page - Cirrus Logic |
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30 / 172 page ![]() PIC16F616/16HV616 DS41288A-page 28 Preliminary © 2006 Microchip Technology Inc. 4.2.4 PIN DESCRIPTIONS AND DIAGRAMS Each PORTA pin is multiplexed with other functions. The pins and their combined functions are briefly described here. For specific information about individual functions such as the Comparator or the ADC, refer to the appropriate section in this data sheet. 4.2.4.1 RA0/AN0/C1IN+/ICSPDAT Figure 4-1 shows the diagram for this pin. The RA0 pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC • an analog non-inverting input to the comparator • In-Circuit Serial Programming data 4.2.4.2 RA1/AN1/C12IN0-/VREF/ICSPCLK Figure 4-2 shows the diagram for this pin. The RA1 pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC • an analog inverting input to the comparator • a voltage reference input for the ADC • In-Circuit Serial Programming clock FIGURE 4-1: BLOCK DIAGRAM OF RA0 VDD VSS D Q CK Q D Q CK Q D Q CK Q D Q CK Q VDD D EN Q D EN Q Weak RD PORTA RD WR WR RD WR IOCA RD IOCA Interrupt-on- To Comparator Analog(1) Input Mode RAPU Analog(1) Input Mode Change Q3 WR RD WPUA Data Bus WPUA PORTA TRISA TRISA PORTA Note 1: Comparator mode and ANSEL determines Analog Input mode. To A/D Converter I/O Pin |
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