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ICSLV810RILF Scheda tecnica(PDF) 2 Page - Integrated Circuit Systems |
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ICSLV810RILF Scheda tecnica(HTML) 2 Page - Integrated Circuit Systems |
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2 / 12 page ![]() Buffer/Clock Driver MDS LV810 F 2 Revision 101305 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICSLV810 Pin Assignment Pin Descriptions 20 pin (150mil) SSOP CLKIN GND CLK 1 VDDA CLK 2 GND CLK 3 CLK 4 VDDA GND GND GND VDDB VDDC CLK 5 CLK 6 CLK 7 CLK 8 CLK 9 CLK 10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Number Pin Name Pin Type Pin Description 1 CLKIN Input Clock input. 2 GND Power Connect to ground. 3 CLK1 Output Clock output. 4 VDDA Power Connect to +1.5 - +2.5 V. 5 CLK2 Output Clock output. 6 GND Power Connect to ground. 7 CLK3 Output Clock output. 8 VDDA Power Connect to +1.5 - +2.5 V. 9 CLK4 Output Clock output. 10 GND Power Connect to ground. 11 CLK5 Output Clock output. 12 CLK6 Output Clock output. 13 GND Power Connect to ground. 14 CLK7 Output Clock output. 15 VDDC Power Connect to +1.5 - 2.5 V. 16 CLK8 Output Clock output. 17 GND Power Connect to ground. 18 CLK9 Output Clock output. 19 CLK10 Output Clock output. 20 VDDB Power Connect to +1.5 - 2.5 V. |
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