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PCA2117DUGS/DA Scheda tecnica(PDF) 72 Page - NXP Semiconductors |
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PCA2117DUGS/DA Scheda tecnica(HTML) 72 Page - NXP Semiconductors |
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72 / 107 page  PCA2117 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4 — 8 April 2015 72 of 107 NXP Semiconductors PCA2117 Automotive LCD driver for character displays 9.3.1 SPI-bus data transfer The chip enable signal is used to identify the transmitted data. Each data transfer is a byte, with the MSB sent first. The transmission is controlled by the active LOW chip enable signal CE. The first byte transmitted is the subaddress byte. The subaddress byte opens the communication with a read/write bit and a subaddress. The subaddress is used to identify multiple devices on one SPI bus. After the subaddress byte, a control byte follows (see Section 9.1). The purpose of this byte is to indicate the content for the following data bytes (RAM, command or control byte). In this way, it is possible to send a mixture of RAM and command data in one access or alternatively, to send just one type of data in one access. Fig 50. SPI data transfer overview Table 46. Subaddress byte definition Bit Symbol Value Description 7R/W data read or write selection 0 write data 1 read data 6to5 SA 01 Subaddress; other codes cause the device to ignore data transfer 4to0 - unused |
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