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PS10 Scheda tecnica(PDF) 7 Page - Supertex, Inc |
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PS10 Scheda tecnica(HTML) 7 Page - Supertex, Inc |
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7 / 13 page ![]() PS10/PS11 7 A051204 The following waveforms demonstrate the sequencing of the PWRGD flags: PWRGD Timing (PS11) Test conditions: VIN = 48V, CRAMP = 10nF, RTB = 118k, RTC = 59k, and RTD = 46.4k. PWRGD Timing (Minimum Delays) Test conditions: VIN = 48V, CRAMP = 10nF, RTB = 3.24k, RTC = 3.24k, RTD = 3.24k, RPULL-UP = 47k. PWRGD Timing (Maximum Delays) Test conditions: VIN = 48V, CRAMP = 10nF, RTB = 118k, RTC = 118k, RTD = 118k, RPULL-UP = 47k. PS11 Power Down Sequence after UVOFF Test conditions: CRAMP = 10nF, RTB = 3.24k, RTC = 3.24k, RTD = 3.24k, RPULL-UP = 47k, CPWRGD_B = 0.47 µF, CPWRGD_C = 0.94 µF, CPWRGD_D = 1.41µF, VUVOFF = 33.4V, the as- sumed brick turn-off threshold is 2.7V min TTL logic high. See power down sequencing on Page 11. Relative to Negative Rail Relative to Negative Rail Relative to Negative Rail Relative to Negative Rail |
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