SWCS049F datasheet(127/144 Pages) TI

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OUT

L max

127

TPS65911

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SWCS049S – JUNE 2010 – REVISED AUGUST 2018

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Applications, Implementation, and Layout

•

VIN is the typical input voltage.

•

fSW is the typical switching frequency.

•

IOUTmax is the maximum load current.

•

KIND is the ratio of ILripple to the IOUTmax. For this application, TI recommends that KIND is set to a value

from 0.2 to 0.4.

(5)

After selecting the value of the inductor, use Equation 6 to calculate the peak current for the inductor in

steady state operation, ILmax. The rated current of the inductor must be greater than the ILmax current.

(6)

7.2.2.3.2 Selecting Output Capacitors

TI recommends ceramic capacitors with low ESR values because they provide the lowest output voltage

ripple. The output capacitor requires either an X7R or X5R rating. Y5V and Z5U capacitors, aside from the

wide variation in capacitance over temperature, become resistive at high frequencies. At light load

currents, the converter operates in PFM mode and the output voltage ripple is dependent on the output-

capacitor value and the PFM peak inductor current. Higher output-capacitor values minimize the voltage

ripple in PFM mode. To achieve specified regulation performance and low output voltage ripple, the DC-

bias characteristic of ceramic capacitors must be considered. The effective capacitance of ceramic

capacitors drops with increasing DC-bias voltage. For the output capacitors of the BUCK converters, TI

recommends placing small ceramic capacitors between the inductor and load with many vias to the PGND

plane. This solution typically provides the smallest and lowest-cost solution available for the converters.

The output capacitance must equal to or greater than the minimum capacitance listed for VDD1, VDD2,

and VIO (assuming quality layout techniques are followed). The recommended value is 10 µF.

7.2.2.3.3 Selecting Input Capacitors

Because of the nature of the switching converter with a pulsating input current, a low ESR input capacitor

is required for the best input-voltage filtering and to minimize the interference with other circuits caused by

high input-voltage spikes. For the VCC1, VCC2, and VCCIO pins, 10 μF of input capacitance (after

derating) is required for most applications. A ceramic capacitor is recommended to achieve the low ESR

requirement. However, the voltage rating and DC-bias characteristic of ceramic capacitors must be

considered. The input capacitor can be increased without any limit for better input-voltage filtering.

NOTE

Use the correct value for the ceramic capacitor capacitance after derating to achieve the

recommended input capacitance.

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