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AD9515/PCBZ Scheda tecnica(PDF) 13 Page - Analog Devices

Il numero della parte AD9515/PCBZ
Spiegazioni elettronici  1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs
PDF  28 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD9515/PCBZ Scheda tecnica(HTML) 13 Page - Analog Devices

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Data Sheet
AD9515
Rev. B | Page 13 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
VS
2
CLK
3
CLKB
4
VS
5
SYNCB
6
VREF
7
S10
8
S9
18 OUT1B
19 OUT1
20 VS
21 VS
22 OUT0B
23 OUT0
24 VS
17 VS
TOP VIEW
(Not to Scale)
AD9515
NOTES
1. THE EXPOSED PADDLE ON THIS PACKAGE IS AN ELECTRI-
CAL CONNECTION AS WELL AS A THERMAL ENHANCEMENT.
FOR THE DEVICE TO FUNCTION PROPERLY, THE PADDLE
MUST BE SOLDERED TO A PCB LAND THAT FUNCTIONS AS
BOTH A HEAT DISSIPATION PATH AS WELL AS AN
ELECTRICAL GROUND (ANALOG).
Figure 6. 32-Lead LFCSP Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 4, 17, 20, 21, 24, 26, 29, 30
VS
Power Supply (3.3 V).
2
CLK
Clock Input.
3
CLKB
Complementary Clock Input. Used in conjunction with CLK.
5
SYNCB
Used to Synchronize the Outputs; Active Low Signal.
6
VREF
Provides 2/3 VS Reference Voltage for Use with Programming Pins S0 to S10.
25, 16, 15, 14, 13, 12, 11, 10, 9,
8, 7
S0 to S10
Programming Pins. These pins determine the operation of the AD9515; 4-state logic.
18
OUT1B
Complementary LVDS/Inverted CMOS Output. Includes a delay block.
19
OUT1
LVDS/CMOS Output. Includes a delay block.
22
OUT0B
Complementary LVPECL Output.
23
OUT0
LVPECL Output.
27, 28
DNC
Do Not Connect.
31, Exposed Paddle
GND
Ground. The exposed paddle on the back of the chip is also GND.
32
RSET
Current Sets Resistor to Ground. Nominal value = 4.12 kΩ.



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