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R5F5671CDDBP Scheda tecnica(PDF) 97 Page - Renesas Technology Corp

Il numero della parte R5F5671CDDBP
Spiegazioni elettronici  120-MHz 32-bit RX MCU, on-chip double-precision FPU, 707 CoreMark, up to 2-MB flash memory (supporting the dual bank function), 384-KB SRAM, various communications interfaces, including SD host interface, Quad SPI, and CAN, Capacitive touch sensing unit,
PDF  178 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F5671CDDBP Scheda tecnica(HTML) 97 Page - Renesas Technology Corp

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R01DS0373EJ0110 Rev.1.10
Page 97 of 178
Apr 15, 2022
RX671 Group
2. Electrical Characteristics
Note 1. If the main clock oscillator is selected by the CLKOUT output source select bit (CKOCR.CKOSEL[2:0]) and the external clock
input is selected by the main clock oscillator switching bit (MOFCR.MOSEL), the pulse width depends on the input clock wave
form.
Figure 2.12
CLKOUT Pin Output Timing
Table 2.22
CLKOUT Pin Output Timing
Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,
VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,
Ta = Topr,
High-drive output is selected by the drive capacity control register
Item
Symbol
Min.
Typ.
Max.
Unit
Test
Conditions
CLKOUT pin output cycle time
tCcyc
25
—
—
ns
Figure 2.12
tCcyc = 25 ns
CLKOUT pin output high pulse width*1
tCH
5—
—
ns
CLKOUT pin output low pulse width*1
tCL
5—
—
ns
CLKOUT pin output rising time
tCr
——
5
ns
CLKOUT pin output falling time
tCf
——
5
ns
tCf
tCH
tCcyc
tCr
tCL
CLKOUT pin output
Test Conditions VOH = 0.7 × VCC, VOL = 0.3 × VCC, C = 30pF



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