Symbol

Parameters

Test conditions

Min.

Typ.

Max.

Unit

TPZH

Load: refer to Figure 7. Enable and

disable waveforms for the receiver

ns

Propagation delay time, high

impedance to high level output

3.8

TPZL

Propagation delay time, high

impedance to low level output

3.8

TD1

Fail-safe to active time

1

µs

TD2

Active to fail-safe time

1

µs

1. TSK is the maximum delay time difference between outputs of all devices when they operate with the same supply voltage, at the same

temperature.

2. Guaranteed by design and characterization

3. TSKD is the maximum delay time difference between TPHLD and TPLHD.

Cold sparing:

The LEOLVDSRD features a cold spare input and output buffer. In high reliability applications, cold sparing

enables a redundant device to be tied to the data bus with its power supply at 0 V (VCC = GND) without affecting

the bus signals or injecting current from the I/Os to the power supplies. Cold sparing also allows redundant

devices to be kept powered off so that they can be switched on only when required. This has no impact on

the application. Cold sparing is achieved by implementing a high impedance between the I/Os and VCC. ESD

protection is ensured through a non-conventional dedicated structure.

Fail-safe:

In many applications, inputs need a fail-safe function to avoid an uncertain output state when the inputs are not

connected properly. In case of an LVDS input short-circuit or floating input, the LVCMOS output remains in stable

logic-high state.

LEOLVDSRD

Electrical characteristics

DS13673 - Rev 4

page 8/23