6

Application information

6.1

Operating input voltage

The LDO40L is a low-dropout linear voltage regulator equipped with a low-RDS-(on) P-channel MOSFET used as a

pass-element. The device internal circuits are able to start with an input voltage as low as 3.5 V, whatever is the

nominal output voltage (see Figure 22. Output voltage vs. input voltage (no load). Defined the desired output

voltage VOUT-NOM, the minimum input voltage VIN-MIN needed to fully bias the pass-element, is

VIN-MIN = VOUT-NOM + VDROP. This allows to exit the dropout condition and achieve output voltage regulation.

The full regulation performance guaranteed by Section 5 Electrical characteristics in terms of output accuracy

and tolerance versus line and load changes is achieved for the highest input voltage among VIN-MIN = VOUT-NOM

+ 1 V and VIN-MIN = 5 V .

At input voltages lower than VIN-MIN = (VOUT-NOM + VDROP) the regulator enters dropout condition, regulation is

not guaranteed and the output voltage tracks the input except for a voltage depending on the load current (IOUT)

and the pass-element resistance (see Figure 22. Output voltage vs. input voltage (no load). This tracking behavior

can be useful during cold crank conditions.

6.2

Output voltage adjustment

The LDO40LY is available in fixed and adjustable output voltage versions. The latter option is usually chosen

when the output voltage has to be set to non-standard values. In the adjustable version, the output voltage can be

set from 2.5 V up to 11 V, by connecting a resistor divider between the ADJ pin and the output.

The architecture of the LDO40LY features a precise bandgap reference, which generates a fixed voltage VREF =

1.2 V between VOUT and ADJ terminals (refer to Figure 2. Block diagram, adjustable version and Figure 5. Typical

application diagram (adjustable versions) ). When the R1-R2 resistor divider is connected, a fixed current is

generated through the divider. Since the contribution of current sourced by the ADJ pin is negligible (few tens of

nA), the resulting output voltage is obtained by using the following equation:

VOUT=VREF1+R2/R1,witℎVREF=1.2Vtyp.

(1)

In order to guarantee a correct regulation, the resistor divider must be calculated for an output voltage of min.

2.5 V.

6.3

Output voltage sense pin

In the DFN6 package on pin 5, an additional VSENSE connection is available. This pin must not be left floating,

since it is necessary for a correct sensing of the output voltage. It can be either connected to the load in a remote-

sensing configuration, or directly shorted to the VOUT pin (pin 4, refer to Figure 4. Typical application diagram

(fixed versions) and Figure 5. Typical application diagram (adjustable versions)).

6.4

Protection features

The device is self-protected from short-circuits and overtemperature events.

In case of strong overload or short-circuit on the output, the output current is limited to a value of typically 1.5 A

and kept constant even when the load impedance is zero. If the overload persists, the temperature on the internal

die rises, until the thermal protection is triggered, which happens when the junction temperature reaches 175 °C.

The device is subsequently shut down. As soon as the junction temperature falls again below 150 °C the device

re-starts.

Even if the above described protections are able to keep the device safe in the worst cases, a correct thermal

design of the application is recommended, according to the operating ambient temperature and the maximum

power dissipation allowed by the chosen package. In order to calculate the maximum power that the device can

dissipate, keeping the junction temperature below TJ-OP = 125 °C, the following formula is used:

PDMAX= 125−TAMB /RTHJ−A

(2)

The power dissipation on the device is calculated as PD = (VIN - VOUT) x IOUT.

LDO40L

Application information

DS12711 - Rev 3

page 8/25