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ORG4572-R01-UAR Scheda tecnica(PDF) 30 Page - List of Unclassifed Manufacturers |
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ORG4572-R01-UAR Scheda tecnica(HTML) 30 Page - List of Unclassifed Manufacturers |
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30 / 40 page ![]() Page 30 of 40 Multi Spider - ORG4572 Datasheet Revision 3.0 November 23, 2014 19.2. HOST PCB FIGURE 15 – HOST PCB 19.3. RF TRACE 0.002 0.051 0.008 0.204 0.005 0.127 inch millimeter FIGURE 16 – TYPICAL MICROSTRIP PCB TRACE ON FR-4 SUBSTRATE 19.4. PCB STACK-UP Signals Signals or Power Ground CS PS LN . . . Ground Ground L2 Signals { controlled impedance 50Ω FIGURE 17 – TYPICAL PCB STACK-UP 19.5. PCB LAYOUT RESTRICTIONS Switching and high-speed components, traces and vias must be kept away from ORG4572 module. Signal traces to/from module should have minimum length. Recommended minimal distance from adjacent active components is 3mm. Ground pads must be connected to host PCB Ground with shortest possible traces or vias. In case of tight integration constrain or co-location with adjacent high speed components like CPU or memory, high frequency components like transmitters, clock resonators or oscillators, LCD panels or CMOS image sensors, contact OriginGPS for application specific recommendations. |
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