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STM32L082CZ Scheda tecnica(PDF) 83 Page - STMicroelectronics |
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STM32L082CZ Scheda tecnica(HTML) 83 Page - STMicroelectronics |
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83 / 132 page  DS10688 Rev 7 83/132 STM32L082xx Electrical characteristics 109 6.3.11 Electrical sensitivity characteristics Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the ANSI/JEDEC standard. Static latch-up Two complementary static tests are required on six parts to assess the latch-up performance: • A supply overvoltage is applied to each power supply pin • A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD 78A IC latch-up standard. Table 54. ESD absolute maximum ratings Symbol Ratings Conditions Class Maximum value(1) 1. Guaranteed by characterization results. Unit VESD(HBM) Electrostatic discharge voltage (human body model) TA = +25 °C, conforming to ANSI/JEDEC JS-001 22000 V VESD(CDM) Electrostatic discharge voltage (charge device model) TA = +25 °C, conforming to ANSI/ESD STM5.3.1. C4 500 Table 55. Electrical sensitivities Symbol Parameter Conditions Class LU Static latch-up class TA = +125 °C conforming to JESD78A II level A |
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