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STM32W108CB Scheda tecnica(PDF) 94 Page - STMicroelectronics |
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STM32W108CB Scheda tecnica(HTML) 94 Page - STMicroelectronics |
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94 / 278 page ![]() General-purpose input/output STM32W108HB STM32W108CC STM32W108CB STM32W108CZ 94/278 Doc ID 16252 Rev 14 In some cases, it may be useful to assign IRQC or IRQD to an input also in use by a peripheral, for example to generate an interrupt from the slave select signal (nSSEL) in an SPI slave mode interface. Refer to Section 12: Interrupts on page 234 for further information regarding the STM32W108 interrupt system. 8.3 Debug control and status Two GPIO registers are largely concerned with debugger functions. GPIO_DBGCR can disable debugger operation, but has other miscellaneous control bits as well. GPIO_DBGSR, a read-only register, returns status related to debugger activity (FORCEDBG and SWEN), as well a flag (BOOTMODE) indicating whether nBOOTMODE was asserted at the last power-on or NRST-based reset. 8.4 GPIO alternate functions Table 17 lists the GPIO alternate functions. Table 16. IRQC/D GPIO selection EXTIx_CR GPIO EXTIx_CR GPIO EXTIx_CR GPIO 0 PA0 8 PB0 16 PC0 1 PA1 9 PB1 17 PC1 2 PA2 10 PB2 18 PC2 3 PA3 11 PB3 19 PC3 4 PA4 12 PB4 20 PC4 5 PA5 13 PB5 21 PC5 6 PA6 14 PB6 22 PC6 7 PA7 15 PB7 23 PC7 Table 17. GPIO signal assignments GPIO Analog Alternate function Input Output current drive PA0 TIM2_CH1(1), SC2MOSI TIM2_CH1(1), SC2MOSI Standard PA1 TIM2_CH3(1), SC2MISO, SC2SDA TIM2_CH3(1), SC2MISO, SC2SDA Standard PA2 TIM2_CH4(1), SC2SCLK, SC2SCL TIM2_CH4(1), SC2SCLK Standard PA3 TIM2_CH2(1), TRACECLK TIM2_CH2(1), SC2nSSEL Standard PA4 ADC4 PTI_EN, TRACEDATA2 Standard |
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