STM32W108CB datasheet(235/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Interrupts

Doc ID 16252 Rev 14

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Memory Fault

MPU mismatch, including access violation and no match.

Synchronous.

Bus Fault

Pre-fetch, memory access, and other address/memory-related faults.

Synchronous when precise and asynchronous when imprecise.

Usage Fault

Usage fault, such as 'undefined instruction executed' or 'illegal state

transition attempt'. Synchronous.

-7-10

Reserved, must be kept at reset value

SVCall

System service call with SVC instruction. Synchronous.

Debug Monitor

Debug monitor, when not halting. Synchronous, but only active when

enabled. It does not activate if lower priority than the current

activation.

-13

Reserved, must be kept at reset value

PendSV

Pendable request for system service. Asynchronous and only pended

by software.

SysTick

System tick timer has fired. Asynchronous.

Timer 1

Timer 1 peripheral interrupt.

Timer 2

Timer 2 peripheral interrupt.

Management

Management peripheral interrupt.

Baseband

Baseband peripheral interrupt.

Sleep Timer

Sleep Timer peripheral interrupt.

Serial Controller 1

Serial Controller 1 peripheral interrupt.

Serial Controller 2

Serial Controller 2 peripheral interrupt.

Security

Security peripheral interrupt.

MAC Timer

MAC Timer peripheral interrupt.

MAC Transmit

MAC Transmit peripheral interrupt.

MAC Receive

MAC Receive peripheral interrupt.

ADC

ADC peripheral interrupt.

IRQA

IRQA peripheral interrupt.

IRQB

IRQB peripheral interrupt.

IRQC

IRQC peripheral interrupt.

IRQD

IRQD peripheral interrupt.

Debug

Debug peripheral interrupt.

Table 43.

NVIC exception table (continued)

Exception

Position

Description

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