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STM32W108CB Scheda tecnica(PDF) 249 Page - STMicroelectronics |
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STM32W108CB Scheda tecnica(HTML) 249 Page - STMicroelectronics |
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249 / 278 page ![]() STM32W108HB STM32W108CC STM32W108CB STM32W108CZ Electrical characteristics Doc ID 16252 Rev 14 249/278 Table 57 describes the key ADC parameters measured at 25°C and VDD_PADS at 3.0 V, for a sampling rate of 6 MHz. HVSELP and HVSELN are programmed to 0 to disable the input buffer. The single-ended measurements were done at finput = 7.7% fNyquist; 0 dBFS level (where full-scale is a 1.2 V p-p swing). The differential measurements were done at finput = 7.7% fNyquist; -6 dBFS level (where full-scale is a 2.4 V p-p swing) and a common mode voltage of 0.6 V. SMP[2:0] Conversion Time (µs) Nyquist Freq (kHz) 3 dB Cut-off (kHz) INL (codes peak) INL (codes RMS) DNL (codes peak) DNL (codes RMS) ENOB (from single-cycle test) SNR (dB) SINAD (dB) SDFR (dB) THD (dB) ENOB (from SNR) ENOB (from SINAD) Equivalent ADC Bits Table 57. ADC module key parameters for input buffer disabled and 6 MHz sampling(1) 1. INL and DNL are referenced to a LSB of the Equivalent ADC Bits shown in the last row of Table 57. ENOB (effective number of bits) can be calculated from either SNR (signal to non-harmonic noise ratio) or SINAD (signal-to-noise and distortion ratio). Parameter Performance 0 1 23 45 6 7 5.33 10.7 21.3 42.7 85.3 171 341 683 93.8 46.9 23.4 11.7 5.86 2.93 1.47 0.732 56.6 28.3 14.1 7.07 3.54 1.77 0.884 0.442 0.084 0.084 0.15 0.274 0.518 1.057 2.106 4.174 0.046 0.044 0.076 0.147 0.292 0.58 1.14 2.352 0.026 0.023 0.044 0.052 0.096 0.119 0.196 0.371 0.007 0.009 0.013 0.015 0.024 0.03 0.05 0.082 5.6 7.0 8.5 10.0 11.4 12.6 13.1 13.2 Single-Ended Differential 35 35 44 44 53 53 62 62 70 71 75 77 76 79 77 80 Single-Ended Differential 35 35 44 44 53 53 62 62 68 70 71 75 71 77 71 77 Single-Ended Differential 60 60 68 69 75 77 75 80 75 80 75 80 75 80 75 80 Single-Ended Differential -45 -45 -54 -54 -63 -63 -68 -71 -70 -76 -70 -77 -70 -78 -70 -78 Single-Ended Differential 5.6 5.6 7.1 7.1 8.6 8.6 10.0 10.1 11.4 11.5 12.1 12.5 12.4 12.9 12.5 13.0 Single-Ended Differential 5.5 5.6 7.0 7.1 8.5 8.6 9.9 10.1 11.0 11.4 11.4 12.4 11.5 12.8 11.5 13.0 5 [15:11] 6 [15:10] 7 [15:9] 8 [15:8] 9 [15:7] 10 [15:6] 11 [15:5] 12 [15:4] |
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