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STM32H757II Scheda tecnica(PDF) 39 Page - STMicroelectronics |
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STM32H757II Scheda tecnica(HTML) 39 Page - STMicroelectronics |
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39 / 251 page  DS12931 Rev 1 39/251 STM32H757xI Functional overview 55 3.25 LCD-TFT controller The LCD-TFT display controller provides a 24-bit parallel digital RGB (Red, Green, Blue) and delivers all signals to interface directly to a broad range of LCD and TFT panels up to XGA (1024x768) resolution with the following features: • 2 display layers with dedicated FIFO (64x64-bit) • Color Look-Up table (CLUT) up to 256 colors (256x24-bit) per layer • Up to 8 input color formats selectable per layer • Flexible blending between two layers using alpha value (per pixel or constant) • Flexible programmable parameters for each layer • Color keying (transparency color) • Up to 4 programmable interrupt events • AXI master interface with burst of 16 words 3.26 DSI Host (DSI) The DSI Host is a dedicated peripheral for interfacing with MIPI® DSI compliant displays. It includes a dedicated video interface internally connected to the LTDC, a generic APB interface that can be used to transmit information to the display, and Video mode pattern generator: • LTDC interface It is used to transmit information in Video mode, in which the transfers from the host processor to the peripheral take the form of a real-time pixel stream (DPI). This interface can also be used to transmit information in full bandwidth in the Adapted Command mode (DBI). • APB slave interface The APB slave interface allows transmitting generic information in Command mode though a proprietary register interface. It can operate concurrently with the LTDC interface either in Video or Adapted Command mode. • The Video mode pattern generator allows transmitting horizontal/vertical color bar and D-PHY BER testing pattern without any kind of stimuli. The DSI Host main features are the following: • Compliance with MIPI® Alliance standards • Interface with MIPI® D-PHY • Support for all commands defined in the MIPI® Alliance specification for DCS: – Transmission of all Command mode packets through the APB interface – Transmission of commands in low-power and high-speed during Video mode • Support for up to two D-PHY data lanes • Bidirectional communication and Escape mode support through data lane 0 • Support for non-continuous clock in D-PHY clock lane for additional power saving • Support for Ultra Low-Power mode with PLL disabled • ECC and Checksum capabilities • Support for End of Transmission Packet (EoTp) • Fault recovery schemes |
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