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SST26VF016BEUI Scheda tecnica(PDF) 73 Page - Microchip Technology |
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SST26VF016BEUI Scheda tecnica(HTML) 73 Page - Microchip Technology |
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73 / 78 page ![]() 2019 Microchip Technology Inc. DS20006153A-page 73 SST26VF016BEUI If the sign bit is zero, then the number is greater than or equal to zero, or positive. If the sign bit is one, then the number is less than zero, or negative. See Table 11-4 for an example of this formula. TABLE 11-4: BPSL/BPEL EQUATION WITH ACTUAL CONSTANT ADDER DERIVED FROM THE FORMULA (2M + 1) + (C) Block Size 8 Mbit to 128 Mbit Comments 8 KByte (Type 2) Bottom BPSL = (2m + 1) + 0FFH BPEL = (2m + 1) + 04H 0FFH = -1; 06H = 6 Odd address bits are Read-Lock bit locations and even address bits are Write-Lock bit locations. 32 KByte (Type3) BPSL = BPEL= (2m + 1) + 0FDH 0FDH= -3 64 KByte (Type 4) BPSL = 00H BPEL = (2m + 1) + 0FCH 00H is Block-Protection Register bit 0 location; 0FCH = -4 32 KByte (Type 3) BPSL = BPEL= (2m + 1) + 0FEH 0FEH=-2 8 KByte (Type 2) Top BPSL = (2m + 1) + 07H BPEL = (2m + 1) + 0EH 07H = 7; 0EH = 14 Odd address bits are Read-Lock bit locations and even address bits are Write-Lock bit locations. |
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