EM78P451WM datasheet(16/54 Pages) EMC

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EM78P451

8-Bit Microcontroller with OTP ROM

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Product Specification (V1.1) 06.30.2003

(This specification is subject to change without further notice)

4.2.5 IOCD (Pull-high Control Register)

/PU9

/PU8

/PU6

/PU5

The default values of /PU5, /PU6, /PU8, and /PU9 are one, which means the pull-high

function is disabled.

/PU6 and /PU9 are “AND” gating with /PHEN, that is, when each one is written as “0”

pull high is enabled.

S7 defines the driving ability of the P70-P72.

0: Normal output.

1: Enhance the driving ability of LED.

4.2.6 IOCE (WDT Control Register)

ODE

WDTE

SLPC

ROC

/WUE

Bit 0 (/WUE)

Control bit used to enable the wake-up function of P60~P67, P74~P75,

and P90~P91.

0: Enable the wake-up function.

1: Disable the wake-up function.

The /WUE bit can be read and written.

Bit 3 (ROC)

ROC is used for the R-option. Setting ROC to "1" will enable the status of

R-option pins (P80, P81) to be read by the controller. Clearing ROC will

disable the R-option function. Otherwise, the R-option function is

introduced. Users must connect the P81 pin or/and P80 pin to VSS by a

560K

Ω external resistor (Rex). If Rex is connected/disconnected with

VDD, the status of P80 (P81) will be read as "0"/"1" (refer to Fig. 7(b)).

The ROC bit can be read and written.

Bit 4 (SLPC)

This bit is set by hardware at the falling edge of wake-up signal and is

cleared in software. SLPC is used to control the oscillator operation. The

oscillator is disabled (oscillator is stopped, and the controller enters the

SLEEP2 mode) on the high-to-low transition and is enabled (the

controller is awakened from SLEEP2 mode) on low-to-high transition. In

order to ensure the stable output of the oscillator, once the oscillator is

enabled again, there is a delay for approximately 18 ms (oscillator

start-up timer (OST)) before the next program instruction is executed.

The OST is always activated by wake-up from sleep mode whether the

Code Option bit ENWDT is "0" or not. After waking up, the WDT is

enabled if Code Option ENWDT is "1". The block diagram of SLEEP2

mode and wake-up caused by input triggered is depicted in Fig. 5. The

SLPC bit can be read and written.

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