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LMV112 Scheda tecnica(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Il numero della parte LMV112
Spiegazioni elettronici  40 MHz Dual Clock Buffer
PDF  14 Pages
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMV112 Scheda tecnica(HTML) 2 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltages (V
+–V−)
5.5V
ESD Tolerance (Note 2)
Human Body
2000V
Machine Model
200V
Storage Temperature Range
−65˚C to +150˚C
Junction Temperature (Note 3)
+150˚C
Soldering Information
Infrared or Convection (35 sec.)
235˚C
Operating Ratings (Note 1)
Supply Voltage (V
+ –V−)
2.4V to 5.0V
Temperature Range (Notes 3, 4)
−40˚C to +85˚C
Package Thermal Resistance (Notes 3, 4)
LLP-8 (
θ
JA)
217˚C/W
2.7V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
J = 25˚C, VDD = 2.7V, VSS = 0V, VCM = 1V, Enable1,2 =VDD,CL =20
pF, R
L =30k
Ω,C
COUPLING = 1 nF. Boldface limits apply at temperature range extremes of operating condition. See (Note 4)
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
Frequency Domain Response
SSBW
Small Signal Bandwidth
V
IN = 0.63 VPP;−3dB
40
MHz
FPBW
Full Power Bandwidth
V
IN = 1.6 VPP;−3dB
28
MHz
GFN
Gain Flatness < 0.1 dB
f > 100 kHz
3.4
MHz
Distortion and Noise Performance
e
n
Input-Referred Voltage Noise
f = 1 MHz
26
nV/
I
SOLATION
Output to Input
f = 1 MHz
91
dB
CT
Crosstalk Rejection
f = 26 MHz, P
IN = 0 dBm
54
dB
Time Domain Response
t
r
Rise Time
0.1 V
PP Step (10-90%),f=1MHz
7
ns
t
f
Fall Time
6ns
t
s
Settling Time to 0.1%
1 V
PP Step,f=1MHz
118
ns
OS
Overshoot
0.1 V
PP Step,f=1MHz
41
%
SR
Slew Rate (Note 7)
V
IN = 1.6 VPP,f=26MHz
110
V/µs
Static DC Performance
I
S
Supply Current
Enable
1,2 =VDD ; No Load
1.6
2.0
2.1
mA
Enable
1,2 =VSS ; No Load
59
72
78
µA
PSRR
Power Supply Rejection Ratio
DC (3.0V to 5.0V)
58
57
68
dB
A
CL
Small Signal Voltage Gain
V
OUT = 0.1 VPP
0.97
0.95
1.01
1.05
1.07
V/V
V
OS
Output Offset Voltage
0.4
16
17
mV
TC V
OS
Temperature Coefficient Output
Offset Voltage (Note 8)
4
µV/˚C
R
OUT
Output Resistance
f = 100 kHz
0.5
Ω
f = 26 MHz
140
Miscellaneous Performance
R
IN
Input Resistance per Buffer
Enable = V
DD
141
k
Ω
Enable = V
SS
141
C
IN
Input Capacitance per Buffer
Enable = V
DD
2.3
pF
Enable = V
SS
2.3
Z
IN
Input Impedance
f = 26 MHz, Enable = V
DD
10.4
k
Ω
f = 26 MHz, Enable = V
SS
10.9
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