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KSZ9563RNXI-TR Scheda tecnica(PDF) 136 Page - Microchip Technology

Il numero della parte KSZ9563RNXI-TR
Spiegazioni elettronici  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

KSZ9563RNXI-TR Scheda tecnica(HTML) 136 Page - Microchip Technology

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KSZ9563R
DS00002419D-page 136
 2017-2018 Microchip Technology Inc.
Note 5-4
The default value of this field is determined by the associated configuration strap value. Refer to
Section 3.2.1, "Configuration Straps," on page 16 for additional information.
11
Power Down
1 = Power-down mode
0 = Normal operation
When this bit is set to ‘1’, the link-down status might not get updated in the
PHY status register. Software should note link is down and should not rely on
the PHY status register link status.
After this bit is changed from ‘1’ to ‘0’, an internal reset is performed. Wait a
minimum of 1ms before read/write access to this PHY’s registers.
R/W
0b
10
Isolate
1 = Logical isolation of the PHY from the switch core
0 = Normal operation
R/W
0b
9
Re-start Auto-Negotiation
Set this bit to re-start auto-negotiation. This bit is self-clearing.
R/W, SC
0b
8
Duplex Mode
This bit is ignored if auto-negotiation is enabled (bit 12 in this register).
1 = Full duplex
0 = Half duplex
R/W
1b
7
Collision Test
1 = Enable COL test
0 = Disable COL test
R/W
0b
6
Speed Select (MSB)
This bit is ignored if auto-negotiation is enabled (bit 12 in this register).
Bits [6, 13]
11 = Reserved
10 = 1000 Mb/s
01 = 100 Mb/s
00 = 10 Mb/s
R/W
Note 5-4
5:0
RESERVED
RO
0x00
Bits
Description
Type
Default



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