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PI5USB2546A Scheda tecnica(PDF) 17 Page - Diodes Incorporated |
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PI5USB2546A Scheda tecnica(HTML) 17 Page - Diodes Incorporated |
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17 / 30 page ![]() PI5USB2546A www.diodes.com July 2018 Document Number DS41265 Rev 1-2 17 © Diodes Incorporated PI5USB2546A USB Low-Speed / Full-Speed Device Recognition PI5USB2546A series is capable of detecting LS or FS device attachment when PI5USB2546A is in SDP or CDP mode. Per USB spec when no device is attached, the D+ and D- lines are near ground level. When a low speed compliant device is attached to the PI5USB2546A charging port, D- line will be pulled high in its idle state (mouse/keyboard not activated). However when a FS device is attached the opposite is true in its idle state, i.e. D+ is pulled high and D- remains at ground level. PI5USB2546A monitors both D+ and D- lines while CTL pin settings are in CDP or SDP mode to detect LS or FS HID device attachment. To support HID sleep wake, PI5USB2546A must first determine that it is attached to a LS or FS device when system is in S0 power state. PI5USB2546A does this as described above. While supporting a LS HID wake is straight forward, supporting FS HID requires making a distinction between a FS and a HS device. This is because a high speed device will always present itself initially as a full speed device (by a 1.5K pull up resistor on D+). The negotiation for high speed then makes the distinction whereby the 1.5K pull up resistor gets removed. PI5USB2546A handles the distinction between a FS and HS device at connect by memorizing if the D+ line goes low after connect. A HS device after connect will always undergo negotiation for HS which will require the 1.5KΩ resistor pull-up on D+ to be removed. To memorize a FS device, PI5USB2546A requires the device to remain connected for at least 11 sec while system is in S0 mode before placing it in sleep or S3 mode. If system is placed in sleep mode earlier than the 11 sec window, a FS device may not get recognized and hence could fail to wake system from S3. This requirement does not apply for LS device. No CTL Pin Timing Requirement after Wake Event and Transition from S3 to S0 There is no CTL pin timing requirement for the PI5USB2546A when the wake configured USB device wakes the system from S3 back to S0. |
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